A conventional asymmetrical data interface, such as that used in SCSI architecture, requires a base current to be always present on an active interface. An output buffer circuit connected to the interface must source current in different directions according to the output data state. In one data state, the current output by the driver is in the same direction as the base current. Thus, the net current on the interface is the output current augmented by the base current. In the other state, the current output by the driver opposes, and is thus diminished by, the base current.
A conventional current steering output buffer is illustrated in FIG. 1. The circuit contains a current driver (here consisting of a matched current source and sink) which is connected to the output nodes by a current switch. The output nodes are connected across a load which may have current flowing through it from other sources (not shown). In a first state, switches S.sub.1 are closed, switches S.sub.2 are open, and the current driver contributes a current I to the total load current. In a second state, switches S.sub.2 are closed, switches S.sub.1 are open, and the current driver contributes a current of -I to the total load current. In a third state, switches S.sub.1 and S.sub.2 are both open and the current driver contributes no current to the net load current.
Some applications require the output currents of the driver in the two data states to be asymmetrical with a ratio chosen to result in a net symmetrical current flow over the data bus. For example, an asymmetrical data bus may have a base load of -2 mA and the driver may provide output currents of +12 mA in state one and -8 mA in state two. In the first state, the net current flow is +12 mA-2 mA=+10 mA. In the second state, the net current flow is 8 mA-2 mA=-10 mA. Thus, the net result of driving asymmetrical currents into an asymmetrical load is a symmetrical current flow of +10 mA and -10 mA.
A conventional asymmetrical current steering output buffer is illustrated in FIG. 2. The circuit contains two independent current drivers, here shown as CMOS devices, which are turned on and off as the data state changes. In the first data state, current source and current sink transistors P.sub.1 and N.sub.1 are connected to the load by switches S.sub.1 to thereby contribute a current of I.sub.1 to the load. In the second data state, current source and current sink transistors P.sub.2 and N.sub.2 are connected to the load by switches S.sub.2 to thereby contribute a current of -I.sub.2 (i.e. a current of I.sub.2 in the opposite direction of I.sub.1) to the load.
These conventional circuits have several drawbacks. Principle among them is switching noise caused by turning the current flow in each current driver on and off as the data state changes. When two or more current sources are used (such as in FIG. 2), the gates of the current source transistors P.sub.1 and P.sub.2 are typically connected together and to a biasing voltage. This results in capacitive coupling between the devices during switching which temporarily effects the value of the bias reference voltage which, in turn, effects the magnitude of the output current. The switching noise and coupling effects not only upset the biasing and output levels of the switching buffer, but also the biasing of other buffers connected to the same reference voltages.